>>105248*6510 not 6502
though 6510 is practically identical to 6502
>>105257You need to understand that C, under the hood, works under an abstract memory model with specific memory buffers, similar to how Java works under an abstract model of a virtual machine (I'm simplifying, but I don't really care about the internal details of the JVM, not my interest).
"High level" is an arbitrary, relative classification. I was not alive back then but I'd imagine they considered C to be a "high-level" programming language back in the 1980s, and then "low-level" in the 1990s once 32-bit CPUs became the norm in all PCs and video game consoles (not including handhelds) and made no sense to bother with writing games in assembly over C once the overhead from compiled code became imperceptible, and other languages further abstracted from hardware like Java were released and popularized. Today non-compiled and/or garbage-collected languages are considered high-level. Depending who you ask, I suppose assembly would be "super duper low level"?
Anyway, back to the C abstract machine model. The machine code produced by a C compiler requires at minimum the following five 16-bit (2-byte) buffers:
Stack Pointer (SP)
Frame Pointer (FP)
Program Counter (PC)
Working Registers 1 & 2
C was designed for CPUs that have at least five 16-bit registers that can fit these five 16-bit buffers. A register is a temporary memory storage placed inside the CPU for quicker access. It's even faster to access than "CPU cache" introduced in modern CPUs. Read
https://stackoverflow.com/questions/10274355/cycles-cost-for-l1-cache-hit-vs-register-on-x86 for more details on that.
The PDP-11 released in 1970, the first CPU that C was designed for, had six 16-bit general purpose registers.
The Intel 8086 released in 1978 had fourteen 16-bit registers, eight of them being general purpose registers, three of them being specialized for SP, FP and PC, and the rest some other specialized registers I don't understand or really care to learn about.
So obviously these CPUs have enough registers to fit the minimum of five 16-bit buffers that are expected by the C abstract memory model.
The 6502 has six specialized registers, five of them being 8-bit (1-byte) with the remaining one being 16-bit (2 bytes) specialized for the Program Counter (PC). Do you see the problem? Where are you going to fit the other four 16-bit buffers that are expected by the C abstract memory model?
How do C cross-compilers like cc65 for 6502 CPUs (as seen in C64, NES, Atari 2600, PC Engine and others) get around this? They place these 16-bit buffers in RAM instead of a CPU register. What's the problem with that? It takes way longer for the CPU to access those buffers, not only by the extra distance but also extra instructions are required to be produced by the compiler to be able to emulate those 16-bit buffers in RAM as 16-bit registers. There are only so many instructions per second (IPS) a CPU can process.
Read more about instructions per second (IPS) here:
https://www.pcmag.com/encyclopedia/term/instructions-per-secondhttps://computer.fandom.com/wiki/Instructions_per_secondhttps://en.wikipedia.org/wiki/Instructions_per_secondNow see this performance benchmark comparing code on the C64, C version (cc65) vs. inline assembly to put this rest:
https://goabq.org/c64/c64-speed-comparison.htmlIt's an impressive experiment, but not practical for writing games with.
When writing with assembly, at least on the 6502, there is no "frame pointer" (FP) you have to worry about, and your stack pointer (SP) does not have to be 16-bits as demanded by C, your working register equivalents on the 6502 do not have to be 16-bit (they are instead three specialized 8-bit registers).
You can read more about registers and their various types and sizes here:
https://www.totalphase.com/blog/2023/05/what-is-register-in-cpu-how-does-it-work/